Field of the Invention
The invention relates to a circuit configuration containing a data memory, a data output and a clock generator interconnected with the data memory. The invention further relates to a device for reading out data from the circuit configuration. The device contains a data memory, a control circuit connected to the data memory and a predefined number of data inputs through which the data can be read.
A corresponding circuit configuration and a corresponding device for reading out data from the circuit configuration are known from the field of memory modules. A data memory in which data relating to the memory modules are stored is provided in a memory module. The data are read out by a test device and used in test programs in order, for example, to check for correct functional capability of the memory module.
It is accordingly an object of the invention to provide a circuit configuration having a variable number of data outputs and a device for reading out data from the circuit configuration with the variable number of data outputs which overcomes the above-mentioned disadvantages of the prior art devices of this general type,
With the foregoing and other objects in view there is provided, in accordance with the invention, a circuit configuration. The circuit configuration contains a serially readable data memory, a first data output, an output line connecting the first data output to the data memory, a clock generator outputting clock signals, and a clock line connecting the clock generator to the data memory. The circuit further contains a second data output and a memory/delay circuit having an input connected to the output line and an output connected to the second data output. The data memory outputs a data item stored therein onto the output line when a clock signal is received from the clock generator, the data item output by the data memory is passed on, with a time delay, through the memory/delay circuit to the second data output.
The object of the invention relates to an improved circuit configuration with which data can be read out from the data memory via an adjustable number of data outputs. A further object of the invention relates to the device for reading out data from a circuit configuration with an adjustable number of data outputs.
An advantage of the circuit configuration is the fact that the data that are to be read out are present in a chronologically offset form at a plurality of data outputs. This makes it possible both to read out all the data serially via a single data output or to read out the data simultaneously in parallel via a plurality of data outputs.
The device for reading out the data has the advantage that the data can be read in serially and/or in parallel via a variable number of data inputs. This provides a high level of flexibility when reading out data.
It is particularly advantageous to dispose a memory/delay circuit between the data memory and a data path circuit. This configuration provides the advantage that only the data that are output from the defined data memory are transmitted with a delay to the data path circuit. Other data that are transmitted to the outside from other data memories via the data path circuit are not affected by this circuit configuration.
A preferred embodiment of the memory/delay circuit is obtained by using a master/slave flip-flop that makes possible a cost-effective memory/delay circuit that operates with a high degree of reliability.
A control unit preferably supplies the memory/delay circuit with a control signal that enables the functioning of the memory/delay circuit. In this way, the memory/delay circuit becomes active only if the data are actually output from the data memory, as a result of which unnecessary power consumption is avoided.
A preferred embodiment of the circuit configuration is that the circuit configuration is integrated on a memory module. As a result of the circuit configuration according to the invention, the multiplicity of data outputs which are present on a memory module in order to read out data are used in a flexible and efficient way for reading out data from a serial data memory. The circuit configuration according to the invention can thus be integrated in a memory module without significant additional costs.
In accordance with an added feature of the invention, the memory/delay circuit is connected to the clock line, and the memory/delay circuit outputs the data item to the second data output with a delay of one clock signal.
In accordance with an additional feature of the invention, the memory/delay circuit is a first memory/delay circuit and a third data output is provided. A second memory/delay circuit having a first input connected to the output of the first memory/delay circuit, a second input connected to the clock line, and an output connected to the third data output, is provided. The data item supplied by the first memory/delay circuit is passed on, with a delay of one clock signal, by the second memory/delay circuit to the third data output.
In accordance with another feature of the invention, a data path circuit is connected to the memory/delay circuit via which data are fed to the first data output and the second data output.
In accordance with a further feature of the invention, the memory/delay circuit is a master-slave flip-flop circuit.
In accordance with another added feature of the invention, there is a control unit and a control line connecting the control unit to the data memory. The control unit enables an outputting of the data item from the data memory with a predefined control signal.
In accordance with another further feature of the invention, there is a control unit and a control line connecting the control unit to the memory/delay circuit, the control unit enables the passing on of the item data.
With the foregoing and other objects in view there is provided, in accordance with the invention, an integrated circuit. The circuit contains a memory module and a circuit configuration integrated on the memory module. The circuit configuration contains a serially readable data memory containing information relating to the memory module, a first data output, an output line connecting the first data output to the data memory, a clock generator outputting clock signals, a clock line connecting the clock generator to the data memory, a second data output, and a memory/delay circuit. The memory/delay circuit has an input connected to the output line and an output connected to the second data output. The data memory outputs a data item stored therein onto the output line when a clock signal is received from the clock generator. The data item output by the data memory is passed on, with a time delay, through the memory/delay circuit to the second data output.
With the foregoing and other objects in view there is provided, in accordance with the invention, a device for reading out data from a circuit configuration. The device includes a predefined number of data inputs through which the data can be read in, a data memory, and a control circuit connected to the data memory and to the data inputs. The data memory defines which of the data inputs are active, and the control circuit reads in the data in parallel via the data inputs.
In accordance with an added feature of the invention, the memory stores timing clock data that can be set and that the control circuit reads in the data in dependence on the timing clock data.
In accordance with a concomitant feature of the invention, the data memory stores a clock time, and in that a clock period is calculated from the number of the data inputs multiplied by the clock time.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a circuit configuration having a variable number of data outputs and a device for reading out data from the circuit configuration with the variable number of data outputs, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.